Product Details
Julin ASCENEXT is a dedicated, whole-board, batch Signal Integrity (SI) time-domain simulation platform focused on the PCB level.
It incorporates a proprietary, self-developed Golden-level high-precision True-SPICE engine—TJSPICE—offering a complete batch simulation solution for everything from general signals and DDRx interfaces to multi-board cascading systems.
Leveraging its Golden-level simulation accuracy, ease of use, and highly efficient automated simulation capabilities, ASCENEXT empowers engineers to perform Design of Experiments (DOE) validation and optimization prior to manufacturing. This significantly reduces physical prototype iterations and effectively compresses R&D costs and development cycles.
Key Highlights
1. Whole-Board Batch High-Efficiency Validation
· Breaking through traditional single-net serial simulation modes, ASCENEXT enables parallel, automated simulation of all critical nets across the entire board.
· It offers dedicated workflows for general signals, DDR-specific analysis, and multi-board cascading, boosting simulation efficiency by several orders of magnitude.
2. Golden-Accuracy Simulation Engine
· The core engine, TJSPICE, delivers True-SPICE level simulation accuracy.
· Combined with advanced 2.5D transmission line and 3D via electromagnetic algorithms, it ensures sign-off grade accuracy for all scenarios, from simple interconnects to complex three-dimensional structures.
3. Streamlined and Automated Operation
· Best practices are solidified into standard workflows—from bulk configuration via Excel templates and automatic signal identification/classification to one-click report generation.
· This significantly lowers the operational barrier, enhancing engineering efficiency and result consistency.
4. Seamless Integration and Flexible Editing
· Supports importing various PCB design formats.
· Allows engineers to quickly extract signal topologies into SIDesigner for advanced editing and simulation, achieving a closed-loop from rapid validation to precise debugging.
Advantages and Value Proposition
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Efficiency Boost: Batch Simulation Reshapes the Validation Process
ASCENEXT's batch processing capability enables a paradigm shift from "point-by-point validation" to "whole-board analysis." This fundamentally transforms the feasibility and efficiency of comprehensive signal verification, significantly unleashing engineering productivity.
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Accuracy Assurance: Golden Engine Supports Precise Decision-Making
From the True-SPICE algorithm to the 2.5D/3D EM solvers, ASCENEXT effectively guarantees whole-board SI simulation accuracy. It provides the Golden Standard reference for design sign-off, thus mitigating design risks.
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Seamless Integration: Workflow Embedded and User-Friendly Experience
Through wizard-driven workflows and template-based operations, the platform encapsulates complex SI expertise into simple, standardized procedures. This greatly lowers the barrier to entry while ensuring the standardization and consistency of design validation.
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Value Closed-Loop: Frontloaded Risk and Cycle Compression
By quickly, accurately, and comprehensively identifying design flaws before physical manufacturing, ASCENEXT drastically reduces the number of costly hardware iterations, directly lowering development costs, and accelerating the time-to-market.
Product Features
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Efficient Data Interface and Topology Management
Multi-Format Design File Import: Natively supports mainstream PCB design formats (e.g., .brd, .odb++), enabling seamless integration with existing design workflows.
Layout Viewing and Stackup Editing: Provides a clear PCB layout view and supports direct viewing and editing of parameters such as stackup structure, material, and thickness, ensuring the simulation environment matches the physical design.
Intelligent Net Identification: Automatically identifies and classifies differential signal pairs and power nets, laying the groundwork for targeted simulation.
One-Click Topology Extraction and Export: Supports one-click extraction of signal topologies from the layout and seamless export to the SIDesigner platform for further detailed simulation and topology optimization.
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Golden-Accuracy Simulation Engine
True-SPICE Transient Algorithm: Delivers the industry's Golden Standard for time-domain simulation accuracy, ensuring the credibility of key metrics like signal waveform, timing, and overshoot.
2.5D Transmission Line EM Algorithm: Efficiently and accurately extracts electromagnetic parameters for complex transmission line structures, balancing computational efficiency with precision.
3D Via Full-Wave EM Algorithm: Performs high-precision electromagnetic modeling for complex 3D structures like vias and pads, accurately characterizing their parasitic effects and resonant properties.
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Streamlined Simulation and Usability Design
General Batch SI Simulation Flow: Provides a high-efficiency batch setup, simulation, and results analysis workflow for general signal types.
DDRx Batch SI Simulation Flow: Offers an exclusive guided workflow for DDR series memory interfaces, covering complete validation requirements from model assignment and ODT settings to timing mode analysis.
Multi-Board Cascading Batch SI Simulation Flow: Supports cascading models of multiple PCBs to perform system-level, batch signal integrity validation for cross-board signals.
Excel Template Batch Processing: Supports bulk configuration of simulation parameters, models, and excitations via Excel templates, enabling rapid reuse of simulation scenarios and team collaboration.
Integrated Waveform Viewer: Incorporates a high-performance waveform viewer that supports fast loading and smooth display of large-scale data, and offers rich measurement and mathematical operation functions.
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Model Support and Automated Reporting
Comprehensive Model Support: Fully supports IBIS models and S-parameters, ensuring accurate characterization of active devices and passive interconnects.
SI Time-Domain Simulation Mode: Specifically focuses on time-domain transient analysis for signal integrity, precisely evaluating signal quality and timing.
One-Click Report Generation: Supports one-click generation of detailed simulation reports (in DOC/HTML format), automatically including simulation configuration, results summary, key waveforms, and Pass/Fail judgments based on user-defined specifications.
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