Julin Technology SIDesigner Wins the “2026 Qiangxin TOP100 – Ecosystem Contribution Award”

On August 20, the “2026 Qiangxin TOP100 Announcement & Awards Dinner,” held as part of the 6th Integrated Circuit Design Innovation Conference & Application Exhibition (ICDIA 2026), took place in Nanjing. SIDesigner, the one-stop SI/PI simulation platform submitted by Julin Technology (Shanghai) Co., Ltd., was selected for the “2026 Qiangxin TOP100 – Ecosystem Contribution Award” following a comprehensive evaluation by expert judges, online voting, and on-site presentation.

For EDA products, ecosystem contribution ultimately needs to be reflected in real-world chip design workflows: Can engineers identify high-speed interconnect risks at an earlier stage? Can they use reliable simulation results to compare design solutions? Can they reduce errors and rework caused by repeatedly transferring data between chip, package, and board levels?

Designed for modern high-speed digital systems, SIDesigner incorporates chip I/O, package parasitics, and PCB interconnects into a unified simulation environment, providing high-speed interfaces with a continuous workflow from analysis and verification to timing signoff.

The platform's core engine, SIDCore, integrates two simulation paths: True-SPICE transient simulation and Channel Simulation. Depending on the specific scenario, engineers can select an appropriate method between rapid exploration and critical behavioral verification, while completing AC analysis, channel simulation, transient simulation, system-level parameter verification, and result post-processing within a unified environment.

This capability covers high-speed parallel interfaces such as DDR, HBM, and UCIe, as well as high-speed serial interfaces such as PCIe, MIPI, USB, and XSR. It serves applications across consumer electronics, computers and office equipment, network communications, the Internet of Things, artificial intelligence, automotive electronics, industrial control, and medical electronics.

Currently, SIDesigner has been deployed at scale by leading companies across multiple industries.

From Signoff-Level Accuracy to a Closed Loop for Engineering Decisions

SIDesigner is entering a new stage of product development.

SIDesigner 1.0 started with signoff-level accuracy, first addressing the question of whether critical simulation results could be trusted. SIDesigner 2.0 extended this foundation into a one-stop engineering solution covering chip, package, and board-level collaboration. In 2026, SIDesigner entered the 3.0 era, with continued capability development planned throughout 2026–2028.

The focus of the 3.0 stage is to build a more complete closed loop connecting accuracy, efficiency, usability, advanced analysis, and design decision-making.

The value of the product is extending beyond completing a single simulation task to include design-space exploration, risk identification, parameter optimization, and Signoff process management. This allows SI/PI verification to enter the design decision process at an earlier stage, while enabling models, solvers, and data from different stages to flow continuously through the same workflow.

Creating Continuous Value Through Real-World Adoption and Use

As high-speed interconnects move into applications such as DDR5, HBM, UCIe, and PCIe 6.0, system-level complexity continues to increase, data rates continue to rise, and design margins continue to narrow. SI/PI verification increasingly depends on coordinated analysis across chip, package, and board levels.

Signoff-level accuracy and stability give simulation tools the opportunity to enter customer workflows. Stable operation, support for engineering decision-making, and integration with existing toolchains determine the level of industry value these tools can ultimately create.

From signoff-level accuracy, to a one-stop engineering solution, and then to a continuous Signoff platform, the development path of SIDesigner has consistently focused on the same goal: making simulation results more trustworthy, providing stronger evidence for engineering decisions, and enabling real-world adoption and use throughout actual product development workflows.

In the future, Julin Technology will continue to advance SIDesigner 3.0 in the areas of accuracy, efficiency, usability, and emerging high-speed interface scenarios. By working together with chip design, packaging, and system companies, Julin Technology will continue to improve SI/PI simulation and Signoff workflows and provide stable, practical tool support for high-performance chip design.